Wafer Level Reliability

Wafer Level Reliability Testing

Wafer Reliability Test

WLR

Reliability Testing

WLR

Semiconductor Reliability Testing

Wafer Level Reliability Testing

Wafer Level Reliability (WLR)

Wafer Level Reliability | WLR probing

MPI Definition

Reliability is defined as the ability of a device to conform to its electrical specifications over a specified period of time under specified conditions at a specified confidence level. Once an integrated circuit (IC) has been designed and the first silicon comes out, Wafer Level Reliability (WLR) tests are performed to accelerate new IC designs and processes verification by assessing the reliability characteristics portion of the technology process. Examples:

  • Device Reliability: HCI, NBTI, PBTI…
  • Gate Oxide Integrity: TDDB, V-Ramp. HV-GOI…
  • Metal Interconnects: EM, ILD TDDB….

Major Requirements 

The major challenge for WLR probing is to meet the contradictory requirements of the typical measure-stress-measure testing : high throughput, high flexibility, long-term measurements and sometimes at extreme temperatures.

MPI Solutions

MPI 300 °C AirCool® PRIME thermal chucks provide excellent flatness over entire temperature range and therefore provide deliver unparalleled performance for multi-site testing. Faster transition time of a chuck is a desirable factor in short term reliability tests at multiple temperatures to enhance the productivity.

On the other hand, reliability of the thermal system which consists of chuck, controller and the chiller, the embedded active probe platen cooling and the ability of the probe systems to assure stable contact over time are essential for long term WLR testing and minimization of the overall cost of test.

MPI integration of Celadon Systems high performance probe cards inside MPI Automated Probe Systems like TS2000-SE or TS3000-SE, makes the high density, multi-site, high temperature wafer level reliability testing easy and versatile.

MPI’s WaferWallet™ extends the TS3500-SE automation significantly without compromising measurement capability. It is designed with five individual trays for manual, ergonomic loading of 150, 200, or 300 mm “WLR” wafers for fully-automated tests.

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Field Application Engineer

Job Location: San Jose, CA

Job Duties:

1. Assist in developing HW and SW measurement methodologies/solutions for analytical wafer probe solutions with signal applications from DC to millimeter wave frequencies as well as Silicon Photonics (SiPH);
2. Collaborate with customers on their measurement challenges, and provide applications specific product training;
3. Provide pre- and post-sale support to AST, customers, service department, and the sales channel developing HW and SW measurement solutions for analytical wafer probe stations;
4. Define application-specific solutions based on customer-provided device data and facilitate both customer and divisional teams to successful results;
5. Perform product training seminars for customer and sales channels as well as participate in trade shows and technical seminars;
6. Make recommendations regarding product improvement, new products, and quality enhancement;
7. Author, document, publish, and present measurement solutions via Seminars, Applications Notes, Briefs, and White Papers;
8. Prepare, plan, and assist with customer product demonstrations that highlight value-based differentiation of AST product offerings;
9. Develop unique and individual customer presentations designed to professionally position the MPI brand in the North American market and deliver formal presentations to customers.

Job Requirements:

Master’s degree in Electrical Eng., Electronics Eng., Physics, or Photonics; Must possess 1 year of relevant work experience; Travel to customers’ sites in US and headquarters in Taiwan is required.

Send resume to: MPI America, Inc., 2360 Qume Drive, Suite C, San Jose, CA 95131, Attn: Janet Chiang